What is SPI Camera
What is SPI Camera?
SPI (Serial Peripheral Interface)
SPI (Serial Peripheral Interface) is a synchronous serial interface technology introduced by Motorola, which is a high-speed, full-duplex, synchronous communication bus. This mode usually has one master device and one or more slave devices, and requires at least four wires, as follows.
- (1) SDI – master device data input, slave device data output.
- (2) SDO-Master device data out, slave device data in.
- (3) SCLK – clock signal, generated by the master device.
- (4) CS-slave device enable signal, controlled by the master device.
If you only do one-way transmission, you can save a data line, master and slave devices a pair of one, CS chip select signal can be omitted, the slave device has been enabled. In the end, only two lines are needed to achieve data transfer.
So SPI camera module is the camera using SPI (protocol) interface.
CPOL is used to determine the idle level of the SCK clock signal, CPOL = 0, the idle level is low, CPOL = 1, the idle level is high. CPHA is used to determine the sampling time, CPHA = 0, sampling at the first clock edge of each cycle, CPHA = 1, sampling at the second clock edge of each cycle. MSB), or low bit priority (LSB). If the data width is more than 8 bits, the high 8 bits are transmitted first, such as one data of 16 bits width, the high 8 bits are sent out first, and then the low 8 bits are sent out.
When image sensor of a camera uses SPI to output image data, Sensor is acting as Master, generating SCK (Serial Clock) and SDO. SDO supports 1bit, 2bit, and 4bit transmission modes, which means 1, 2, or 4 Data lines are required.
The various configuration sequences are as follows, MSB sends first, LSB is similar.
SPI does not have HSYNC and VSYNC used for line synchronization and frame synchronization like DVP. For marking line head and line tail, frame head and frame tail, a 24bit Sync code and an 8bit Packet ID are defined, and four Packet IDs are defined to indicate Frame Start, Frame End, Line Start and Line Start and Line End.
Since the SPI interface has so many different modes to choose from, the Sensor is open to have the relevant registers for setting. When debugging, figure out what the protocol requirements of the master receiver are, such as LSB or MSB, CPHA leading edge or trailing edge, CPOL high or low, SCK continuous or non-continuous, multi-SDO data allocation, data packing format, how many SDOs are needed, hardware wiring requirements, etc., according to the requirements. The SPI can be configured according to the requirements of the hardware wiring requirements. At present, SPI is mainly used in low pixel (8W, 30W) Sensor, such as GC6123, GC6133, GC0310, BY3A01, SP0820, SP0A19, etc. The platforms supporting SPI are basically feature machines, such as SC6531, MT6261, RDA8851, etc.
SPI interface has no specified flow control and no answer mechanism to confirm whether data is received. SCK, SDO are high-frequency lines, Layout can not be each other or with other high-frequency lines side by side, overlapping alignment, away from the high-frequency signal lines, it is best to use the GND line to protect.
Camera SPI output waveform in the HB, VB idle state, SDO output low, SCK can output low, but also can continue to output the clock signal.